PUBLICATIONS論文・講演等

国際論文誌

2024

1. R. Sumikawa, A. Kosuge, Y. C. Hsu, K. Shiba, M. Hamada, T. Kuroda “A183.4-nJ/inference 152.8-μW 35-Voice Commands Recognition Wired-Logic Processor Using Algorithm-Circuit Co-Optimization Technique,” in IEEE Solid-State Circuits Letters, vol. 7, pp. 22-25, 2024.

2. D. Li, Z. Zhan, R. Sumikawa, M. Hamada, A. Kosuge, T. Kuroda “A 0.13mJ/Prediction CIFAR-100 Fully Synthesizable Raster-Scan-Based Wired-Logic Processor in 16-nm FPGA,” in IEICE Trans. Electronics, Vol.E107-C, No.6, pp.155-162, June 2024.  

3. K. Tsuda, K. Furutani, Y. Yakubo, H. Godo, Y. Ando, A. Kosuge, T. Nakura, and S. Yamazaki, “A 1.1-nJ/Classification True Analog Current Computing on Multilayer Neural Network With Crystalline-IGZO/Si-CMOS Monolithic Stack Technology,” in IEEE Journal of the Electron Devices Society, vol. 12, pp. 594-604, 2024. doi: 10.1109/JEDS.2024.3439712

4. A.Kosuge, H.Sumi, N.Shimamoto, Y.Ochiai, H.Amano, T.Mogami, Y.Mita, M.Ikeda, and T.Kuroda, “Agile-X: A Structured-ASIC Created with a Mask-less Lithography System Enabling Low-Cost and Agile Chip Fabrication,” IEEE Transactions on Very Large Scale Integration Systems (Accepted)

5. A. Kosuge and K. Lee, “Solid-State Circuit Directions Committee’s “Think Impact With ICs” Workshop on System, Circuit, Device, and Packaging Co-Optimization for Next Generation AI Systems [Society News],” in IEEE Solid-State Circuits Magazine, vol. 16, no. 4, pp. 111-113, Fall 2024.

6. Y. Pan, D. Li, M. Hamada, A. Kosuge, “Analysis and Design of Coarse and Fine Segmented LUT Implementation for FPGA-Based Resource Efficient Wired-Logic DNN Processors,” in IEICE Trans. Electronics, (Accepted).