Beyond IC Advanced 3D Chip Integration and Low-power Circuit Design Technology for Next-generation AI Computing Systems
Kosuge Laboratory, Graduate School of Engineering The University of Tokyo
TOPICS
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2024.11.15Dr. Kosuge’s article on the AI processor workshop organized by IEEE Solid-State Dircuits Directions in August 2024 is published in the Fall 2024 special issue of IEEE Solid-State Society Magazine. You can see from here!
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2024.11.9Kawada-san who participated in our research group as an on-campus internship last year, gave an oral presentation at the international conference IEEE APC-CAS 2024. She presented an AI processor technology that enables low latency and low power feature extraction in general speech recognition AI functions.
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2024.10.14Every year, Matsuo-Iwasawa Laboratory, Graduate School of Engineering, The University of Tokyo, organizes a Deep Learning Lecture Series for the general public. Prof. Kosuge was invited and gave a lecture titled “Semiconductor Ecosystem Supporting the Evolution of LLM.”. Details can be found Here.
RESEARCH
THEME
AI technology is transforming and enriching our lives, but also consumes huge amount of power to process large amounts of data. To solve the power problem caused by AI, we need next-generation integrated circuits (Beyond IC) specialized for the AI era, with performance beyond what an extension of conventional ICs can offer. We are researching wired-logic processors and 3D integration technologies specialized for AI processing which will achieve power reductions of three orders of magnitude or more.
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AI processor
With the new architecture and in/near memory computing techniques, we will achieve a 1,000 times improvement in power efficiency over conventional methods.
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3D Chip Integration
We will develop a new chip stacking method for high-dense computing. Highly reliable and dense interconnection realize scalable and high throughput computing system.
