E. Kobayashi, A. Kosuge, M. Hamada, T. Kuroda, “An Occlusion-Resilient mmWave Imaging Radar-Based Object Recognition System Using Synthetic Training Data Generation Technique,” in 49th Annual Conference of the IEEE Industrial Electronics Society (IECON), Oct. 2023.
A. Kosuge, R. Sumikawa, Y. -C. Hsu, K. Shiba, M. Hamada, T. Kuroda, “A 183.4nJ/inference 152.8uW Single-Chip Fully Synthesizable Wired-Logic DNN Processor for Always-On 35 Voice Commands Recognition Application,” in IEEE Symposium on VLSI Circuits, June 2023.
X. Wang, A. Kosuge, Y. Hayashi, K. Shiba, M. Hamada, T. Kuroda, “Analysis and Design of a 7 Gb/s Rotatable Non-contact Connector with Grid Array Package Application,” International New Circuits and Systems Conference (NEWCAS), June 2023.
N. Shimamto, A. Mizushima, D. Bourrier, E. Ota, A. Higo, H. Granier, A. Kosuge, M. Ikeda, T. Kuroda, and Yoshio Mita, “Micron-to-Submicron Cu electroplating in view of Agile-X LSI Chips Fabrication using Open Facility”, 3rd European Nanotechnology Research Infrastracture Symposium (ENRIS 2023), May, 2023.
D. Li, Y. -C. Hsu, R. Sumikawa, A. Kosuge, M. Hamada, T. Kuroda, “A 0.13mJ/prediction CIFAR-100 Raster-Scan-Based Wired-logic Processor Using Non-linear Neural Network” in IEEE International Circuits and Systems (ISCAS), May 2023.
Y. Hsu, A. Kosuge, R. Sumikawa, K. Shiba, M. Hamada, T. Kuroda, “A Fully Synthesized 13.7μJ/prediction 88% Accuracy CIFAR-10 Single-Chip Data-Reusing Wired-Logic Processor Using Non-Linear Neural Network,” IEEE 28th Asia and South Pacific Design Automation Conference (ASP-DAC), Jan. 2023.
R. Sumikawa, K. Shiba, A. Kosuge, M. Hamada, T. Kuroda, “A 1.2nJ/Classification Fully Synthesized All-Digital Asynchronous Wired-Logic Processor Using Quantized Non-linear Function Blocks in 0.18µm CMOS,” IEEE 28th Asia and South Pacific Design Automation Conference (ASP-DAC), Jan. 2023.