Beyond IC Advanced 3D Chip Integration and Low-power Circuit Design Technology for Next-generation AI Computing Systems
Kosuge Laboratory, Graduate School of Engineering The University of Tokyo
TOPICS
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2025.2.25D2 Shin presented his work on a novel structured ASIC-based AI processor that achieves both low development cost and low power consumption at ISSCC 2025. Please check here.
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2025.1.22Pan presented his DNN processor design method at ASP-DAC 2025! His work received Special Feature Award. Please check here.
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2024.12.21D2 Shin’s paper has been accepted to ISSCC. He will present his research on via-programmable neuroarray processor for low-cost low-power AI processors.
RESEARCH
THEME
AI technology is transforming and enriching our lives, but also consumes huge amount of power to process large amounts of data. To solve the power problem caused by AI, we need next-generation integrated circuits (Beyond IC) specialized for the AI era, with performance beyond what an extension of conventional ICs can offer. We are researching wired-logic processors and 3D integration technologies specialized for AI processing which will achieve power reductions of three orders of magnitude or more.
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AI processor
With the new architecture and in/near memory computing techniques, we will achieve a 1,000 times improvement in power efficiency over conventional methods.
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3D Chip Integration
We will develop a new chip stacking method for high-dense computing. Highly reliable and dense interconnection realize scalable and high throughput computing system.
